Which is preferred latches or flip flops

RS flip-flop / SR flip-flop (not clock-controlled)

The RS flip-flop (not clock-controlled) is a bistable element and the basic building block for all flip-flops in digital technology. You can build this flip-flop from two NOR links or two NAND links. The RS flip-flop with NOR elements is referred to as a 1-active flip-flop. The RS flip-flop with NAND gates is called a 0-active flip-flop.
In digital technology, this type of flip-flop is often switched behind switches or buttons in order to be able to evaluate the mechanical switching process without bouncing.

Difference: RS flip-flop and SR flip-flop

There are two names for this flip-flop in the literature: RS flip-flop (RS-FF for short) and SR flip-flop (SR-FF for short). difference between RS flip-flop and SR flip-flop According to IEC61131, the dominance is related to the Q signal if both Reset (R) and Set (S) are logical 1. The RS flip-flop is a bistable function block with a dominant reset. The SR flip-flop is a bistable function block with dominant setting.

In the following, the SR flip-flop (SR-FF) is mentioned, but only the RS flip-flop (RS-FF) is explained.

A simple non-clock-controlled flip-flop is interconnected from two NOR gates. This basic circuit is called a NOR flip-flop or NOR latch. Only when the flip-flop outputs are swapped does it become an RS flip-flop.
As a rule, the two outputs (Q1 and Q2) negated to each other. But because the outputs can output an L level at the same time, they must always be viewed separately.

Circuit symbols

In the circuit symbol of the SR or RS flip-flop, the inputs are labeled S (set) and R (reset). Q2 is to Q1 negated.
This symbol is the symbol of a real RS flip-flop.

Truth table

E.1 (S)E.2 (R)Q1Q2Status
1010Set
00XXto save
0101Reset
1100cannot be saved

Explanation of the states in the truth table

Put: If the S input is high, output Q1 set to H level.
To save: If the S input has an L level, output Q remains1 unchanged.
Reset: If the R input is connected to the H level, output Q1 set to L level.
Cannot be saved: If both inputs are set to H level, both outputs are L level. This state cannot be saved. In the usual specialist literature, this state is referred to as "indefinite" or "forbidden". However, the uncertainty only occurs if both inputs are given an L level at the same time after this state. This subsequent state is "indefinite" because it is not clear which output is high.
It is a problem if an H level at both inputs is followed by an L level at both inputs.

A simple non-clock-controlled flip-flop can also be interconnected from NAND links. This basic circuit is then called a NAND flip-flop or NAND latch. If the NOR links are replaced by NAND links, then you get a flip-flop with negated inputs (see circuit symbols). The flip-flop only becomes an RS flip-flop when a NOT link is connected in front of the flip-flop inputs.
This is set by the L level at the S input and reset at the R input. The memory state is established by an H level at both inputs.
As a rule, the two outputs (Q1 and Q2) are negated to one another. But because the outputs can output an L level at the same time, they must always be viewed separately.

Circuit symbols (of a NAND flip-flop)

An RS flip-flop with NAND links can be recognized by the negated inputs.
The inputs are designated with S (set) and R (reset) in the circuit symbol. Q2 is to Q1 negated.
However, this circuit symbol is not a real RS flip-flop. It is more like the circuit symbol of a NAND flip-flop. Only with a NOT link in front of the inputs does it become a real RS flip-flop. That means, only with additional wiring, from two NOT logic elements a NAND flip-flop becomes an RS flip-flop.

Truth table

E.1 (S)E.2 (R)Q1Q2Status
0110Set
11XXto save
1001Reset
0011cannot be saved

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